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Larry Kiss

Larry Kiss

Co-Founder and CTO at SpotHero

 LinkedIn profile

Seniority

8 Years

Hierarchy

C-Suite

Management Experience

Feedback
New Manager
Conflict solving
Personal growth
Career Path
Company Culture
New Manager of Manager
Managing Expectations
Scaling Team

Hi everyone! My name is Larry Kiss and I am currently Co-Founder and CTO at SpotHero, where I lead a team of 75 people. Looking forward to meeting you!

Sorry, I am not currently available for mentoring sessions.

Experience

Co-Founder and CTO

SpotHero

Sep 2011 - current

At SpotHero, we're making life easier for the daily driver. I'm responsible for leading an amazing team to build out the best parking app in the world. My team delivers all things technology, product, and UX related.

Co-Founder and CTO

iNotary

Mar 2011 - Dec 2012

Responsible for all aspect of iNotary's technology and product. \- Architected site, backend, and iOS app. \- Managed product, design and UX. \- Manage team of web and native app developers.

Web & iOS Freelance Developer

Kiss Technology Consulting, LLC

Aug 2010 - Dec 2012

\* Java contract work for a VHDL IDE startup. \* Web based startup work that included experience in Python, HTML, XML, Pylons, and SQLAlchemy.

Senior Design Engineer

Motorola

Jan 2008 - Jan 2011

\* Directed the digital portion of multiple designs – including high level design, software/hardware integration and documentation. \* Interfaced with customers and translated broad requirements to engineering specifications. \* Supervised contractors hired for hardware development. \* Architected and implemented multiple FPGAs using VHDL. \* Experience with Low Power Design techniques. \* Lead hardware (electrical and mechanical) and software design reviews. \* Experience selecting and implementing GSM/CDMA, WiMAX, WLAN, GPS, FLEX Pager, and other embedded components including Microcontrollers, LPDDR memory, FPGAs, EEPROMs, and all interfacing glue logic.

Design Engineer

Advanced Micro Devices (AMD)

Dec 2005 - Dec 2007

\* Designed multiple testplans that were used as guidelines as to how corresponding functional blocks should be tested and deemed functionally correct over twelve months. \* Designed a testbench using C++ for an RTL block that was a part of a Microprocessor’s unified cache system. \* Designed multiple c++ checkers that were used to check the functionality of RTL blocks. \* Designed multiple c++ random requestors that injected random traffic into RTL blocks. \* Spent a large portion of time debugging RTL code using the aforemention testbench and checkers. \* Increased knowledge of Microprocessor Architecture and the design and implementation of an actual microprocessor. \* Worked independently and was responsible for driving all given tasks to completion without direct supervision. \* Increased knowledge of C++, Verilog HDL, and SystemVerilog.

Design Verification Engineer Co-Op

Advanced Micro Devices (AMD)

Jan 2005 - Sep 2005

\* Gained knowledge of the methodology for the Design and Design Verification of Microprocessor and ASIC devices. \* Designed a testbench and functional reference model for a Camera Interface, a Display Controller, and a DDR2 Memory Controller of an embedded Microprocessor. \* Designed multiple test-cases verifying RTL design correctness which included Directed and Random Coverage. \* Gained knowledge of Verilog HDL, SystemC, C and C++.

Electrical Engineering Intern

Agilent Technologies Inc., LFS

Jun 2004 - Aug 2004

\* Root caused an erroneous DC-DC power supply oscillation using strategic troubleshooting techniques. \* Gained knowledge in switching power supplies and analog circuit design. \* Analyzed electrical signals using Fast Fourier Transform and other Fourier analysis techniques. \* Gained skills in project management, timing, and organization.

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